1. Field of the Invention
This invention relates to the communication of signals, and more particularly to the transmission and reception of digital signals.
2. Background of the Related Art
Communication systems are used to transmit and receive signals over a communication channel. One common form of communication system is a telephone system for transmitting and receiving voice and data signals. FIG. 1 is a pictorial representation of a telephone communication system 10. Central office 11 sends telephone signals over wires 12 to central office 14. Similarly, central office 14 can send signals to central office 11 over wires 12. Wires 12 are supported by poles 16.
The telephone communication system 10 is preferably a digital communication system; i.e., digital signals representing digital data are sent over wires 12. When carrying digital data, these wires 12 are often referred to as "T1" lines. This digital data can represent voice and other types of analog data, as well as purely digital information. Since the distances between offices 11 and 14 may be relatively large, the digital signal carried by wires 12 may pick up "glitches" or "noise". To reduce this noise, several repeater apparatus 18 are preferably placed on intermediate poles 16 or at the receiving offices 11 and 14. A repeater apparatus 18 detects and then retransmits the digital signal so that the original digital values of the signal are not obscured by noise. Using several repeater apparatus 18, a signal may be transmitted a long distance over wires 12 and arrive at a receiver including virtually all of its original information.
A repeating apparatus 18 and a receiving apparatus 19 are shown in FIG. 2. Receiving apparatus 19 will typically be provided at receiving offices 11 and 14. Clock and data recovery apparatus 20 receives a signal from T1 line 12 and derives a clock signal therefrom. This can be accomplished, for example, by oversampling, as is well known to those skilled in the art. The data signal output of apparatus 20 retains the information contained in the original signal on T1 line 12. A jitter attenuator 22 is coupled to the clock and data outputs of the apparatus 20 to remove digital "jitter".
Jitter is defined as intermittent phase shifts of a digital signal. An example of jitter is shown in FIG. 3. Waveform 23 is an example of an ideal, original waveform transmitted from a source. Waveform 24 is a waveform that includes jitter. Jitter shifts 26 can be caused by repeaters, other equipment, inductive delays, etc. Jitter can accumulate over time and eventually cause the repeated waveform to be an entire pulse width off from the original waveform. Thus, over many repeaters, jitter can cause uncertainty in which time period a pulse occurs. Timing and information errors at the receiving end can result from this effect.
Problems from jitter can also occur in the clock and data recovery apparatus 20 shown in FIG. 2. The phase locked loop typically used in apparatus 20 can oscillate for a short time at a specific frequency without receiving a timing reference from a pulse, but will begin to drift and produce an incorrect clock signal if there is a long interval of zeros in a signal, i.e. no pulse edges. Such an interval of zeros can also cause jitter.
The problem of jitter has been addressed in the prior art by an analog jitter attenuator. Typically, an analog jitter attenuator 22 is connected to the clock and recovery block 20 to receive the clock and data signals. The jitter attenuator produces an output clock at an average of the input clock frequency. Since the output clock is the average of the input clock frequency, short term variations in the input signal are filtered out. These analog jitter attenuators 22 of the prior art have many of the accuracy, stability and noise problems associated with analog devices.
An article, "Digital Phase-Locked Loop with Jitter Bounded", by Stephen M. Walters and Terry Troudet (IEEE Transactions on Circuits and Systems, July 1989), describes a digital jitter attenuator that uses a digital phase-locked loop to generate signals that satisfy pre-imposed requirements on jitter over a given range of frequencies. Control of the jitter is obtained by means of a frequency-phase window comparator which compares a bit overflow/underflow of a digital controlled oscillator to a fixed frequency-phase window.
A problem with this prior art digital jitter attenuator occurs due to the high frequency clock required in the numerically controlled oscillator (NCO) to produce a jitter-free data signal. A high frequency clock is required to achieve an accurate output clock that can be finely adjusted. In the prior art, a large number of bits is required in the NCO to achieve such a high resolution. However, it is difficult to process (i.e., add) a large-bit number in the short period of the high frequency clock. The prior art is thus limited in the frequency resolution of the signal clock it can output and the amount of jitter it can reduce.
What is needed is an apparatus and method that will reduce jitter in transmission systems using an accurate, high resolution digital system.